# Flight Panel R1 electrical plan

**Fourteen moving 38-position modules, five MCP23017 expanders, one ESP32-C3.** This replaces the original PCF8575 wiring. It is an engineered bench plan, not physically validated hardware. Prove one complete mechanism before replicating it. The expansion boards, level shifter and fused power distribution occupy the rear electronics space; original module enclosure fit does not establish their clearance.

## Power distribution

Use the BOM's enclosed regulated **5 V / 6 A Mean Well GST60A05-P1J**, matched rated inlet/pigtail and covered terminals. Keep the factory barrel plug accessible as the manual power disconnect; R1 does not include a separate inline switch. Do not modify the mains side or substitute9 V/12 V. Motor power comes from two separate row branches; signal wires and the ESP USB port never carry the full motor current.

```text
Enclosed 5 V brick → accessible barrel plug / rated inlet → fused distribution
                                                  ├─3 A top-row motor fuse → seven ULN boards +5 V
                                                  ├─3 A bottom motor fuse  → seven ULN boards +5 V
                                                  └─1 A logic fuse → C3 verified5 V input,
                                                                  five MCP VCC, shifter HV,
                                                                  fourteen Hall VCC
Brick GND → common distribution → dedicated motor row returns + logic return
```

Use the selected factory-rated high-current inlet leads and 18 AWG main/row power wiring, with short 24 AWG individual module branches. Fuse holders, terminals and connectors need appropriate DC/current ratings. Fuse ratings are protective design choices, not measured operating currents. The software limits simultaneous drive to four motors, but wiring protection must remain effective with a software/driver fault. Commission with a current-limited source if available. Target full-panel peak below 4.8 A and check the farthest module's voltage; measured current, fuse behavior and thermal acceptance remain open.

Every ULN board needs +5 V, GND and its matching unmodified 5 V 28BYJ-48 motor plug. Verify the driver COM/flyback connection and motor common lead reach +5 V. Every Hall gets logic 5 V and logic GND plus a local 100 nF bypass. Keep motor-current returns out of Hall/signal wiring and join grounds at distribution. Add/verify 100 nF bypass near each expander and appropriate bulk decoupling at row distribution. Capacitors cannot compensate for undersized wiring.

Disconnect external board 5 V while using computer USB unless the exact controller's power path prevents backfeed. Never connect5 V to the C3's 3V3 pin or GPIO. The final 5 V pin and USB arrangement must match the purchased C3 board.

## Controller, translation and independent reset

| ESP32-C3 / low side | BSS138 four-channel board | High side /5 V logic |
| --- | --- | --- |
| 3V3 | LV reference | — |
| — | HV reference | fused logic 5 V |
| GND | GND | logic GND |
| GPIO4 | LV1↔HV1 | every MCP SDA |
| GPIO5 | LV2↔HV2 | every MCP SCL |
| GPIO10, open drain | LV3↔HV3 | every MCP RESET joined |
| unused | LV4/HV4 | unconnected |

Use a bidirectional open-drain I²C shifter, not a push-pull UART-only converter. The MCP and Hall domain is 5 V; ESP domain is 3.3 V. GPIO4/5 avoid the SuperMini's GPIO8 indicator LED and GPIO9 boot strap. Verify exact board pin labels. Adafruit 5346's actual schematic has direct bus lines to the MCP and pullups to VCC; do not infer that 5 V operation is safe to connect directly to ESP from generic product copy.

The firmware asserts RESET before initialization, releases it, writes both OLAT registers zero **before** setting output directions, and verifies direction-register readback. Each ULN input has a10 k pulldown, so MCP reset/input state leaves coils off. On a detected bus fault, GPIO10 holds all MCPs reset without needing a successful I²C command. Reset is shared across all five boards; disconnecting one board must not interrupt the reset chain to the others.

This is fault containment for detected software/bus errors, not an independent power cutoff or safety certification. If a controller crashes, a driver shorts, reset wiring breaks or a mechanism jams, disconnect motor power at the accessible barrel plug.

## Exact Adafruit 5346 pullup preparation

The [Adafruit 5346 Eagle schematic](https://github.com/adafruit/Adafruit-MCP23017-PCB/blob/main/Adafruit%20MCP23017%20GPIO%20Expander.sch) uses **R3, a four-element 10 k resistor array**: SCL pullup, SDA pullup, RESET pullup and A2 pulldown. It is not a pair of standalone bus resistors.

For the specified five-board build and BSS138 board with 10 k pullups on each side:

1. Leave R3 intact on the first four MCP boards, addresses 0x20–0x23.
2. On the **fifth board only**, address0x24, remove R3 carefully without damaging pads or leaving solder bridges.
3. Explicitly bridge that board's **A2/+4 address jumper HIGH**. Confirm A0/A1 are LOW. Removing R3 removed its A2 pulldown; this deliberate HIGH strap replaces the need for it.
4. Connect its RESET pin to the common RESET net. That net remains pulled up by the other four boards and the shifter; the fifth board cannot be operated separately without a RESET pullup.
5. With power off, confirm continuity, jumper states, no bridges and expected resistor networks. Verify the delivered board revision against the schematic before modifying it.

This gives five 10 k paths on each 5 V SDA/SCL line (four MCPs plus shifter): effective2 k. The short 3.3 V side retains the shifter's10 k. Firmware disables the ESP internal bus pullups/pulldowns after Wire initialization, so they do not add uncounted parallel loads. Combined sink current at 0.4 V is approximately `(5−0.4)/2000 + (3.3−0.4)/10000 = 2.59 mA`, about2.88 mA with both rails high5% and resistors low5%. These are calculations, not measurements. Do not add more bus pullups. A single-module prototype with one unmodified MCP and the shifter has 5 k high-side and 10 k low-side pullups; it does not need R3 removal.

Keep the rear I²C backbone short, without long module stubs; each module receives local driver/Hall signals from its assigned bank. Use100 kHz. Scope both voltage domains at full build: verify correct levels, rise≤1 µs and bus capacitance within 400 pF. Verify combined sink current if changing boards, pullups or wiring. The speed is deliberately conservative, not the MCP's maximum rating.

## Bank and slot map

All indexing is zero-based. Module0 is top-left, module 6 top-right, module 7 bottom-left, module 13 bottom-right. One bank crosses the row boundary.

| MCP address | A2 A1 A0 | Slot0 | Slot1 | Slot2 |
| --- | --- | --- | --- | --- |
| 0x20 | 0 0 0 | top0 / module 0 | top1 / module 1 | top2 / module 2 |
| 0x21 | 0 0 1 | top3 / module 3 | top4 / module 4 | top5 / module 5 |
| 0x22 | 0 1 0 | top6 / module 6 | bottom0 / module 7 | bottom1 / module 8 |
| 0x23 | 0 1 1 | bottom2 / module 9 | bottom3 / module 10 | bottom4 / module 11 |
| 0x24 | 1 0 0 | bottom5 / module 12 | bottom6 / module 13 | unused |

Address pins must not float or be strapped to both rails. MCP input/output pins GPA0…GPB7 are different from the A0/A1/A2 **address pins**; Adafruit's board labels the port pins separately.

| Slot on any bank | MCP outputs→ULN inputs, in order | Hall OUT input |
| --- | --- | --- |
| 0 | GPA0→IN1, GPA1→IN2, GPA2→IN3, GPA3→IN4 | GPB4 |
| 1 | GPA4→IN1, GPA5→IN2, GPA6→IN3, GPA7→IN4 | GPB5 |
| 2 | GPB0→IN1, GPB1→IN2, GPB2→IN3, GPB3→IN4 | GPB6 |

GPB7 is an unused output held LOW. The unused third motor slot on0x24 also stays LOW. Current Microchip documentation identifies GPA7 and GPB7 as output-only; this map obeys that restriction. MCP supports eight addresses and 100 kHz operation; its reset defaults permit the external pulldowns to establish the off state. [Microchip MCP23017 datasheet, revision E](https://ww1.microchip.com/downloads/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP23017-MCP23S17-16-Bit-IO-Expander-with-Serial-Interface-DS20001952.pdf)

Each moving module gets **four 10 k pulldowns from IN1–IN4 to GND**, and **one 10 k Hall OUT pullup to logic 5 V**. Total: 56 pulldowns +14 Hall pulls = 70 resistors, before any board-repair provisions. These are pulldowns at motor inputs, unlike the obsolete PCF correction. No old PH4 power/I²C daisy-chain harness is used. Label each bank/slot and its four phase wires plus Hall signal; use secure connectors after the bench wiring is proven.

## Drive margin and Hall sensor

MCP 5 V is selected because its documented high-output drive test guarantees VDD−0.7 V at 3 mA with 4.5 V supply. The board's input load must meet that tested range, not merely the pin's absolute-maximum current. Measure every type of purchased ULN board with its pulldown and indicator circuitry: aim for no more than 3 mA source current per high MCP pin. A10 k pulldown alone draws about0.5 mA at 5 V.

[TI ULN2003A revision T](https://www.ti.com/lit/ds/symlink/uln2003a.pdf) has 2.7 k input resistors and specifies ON input levels suitable for 5 V CMOS drive. Board LEDs may add input load depending on the actual circuit. Retain LEDs only after their circuit/current is checked; if total input load exceeds the MCP's tested drive budget, remove the affected indicators or increase their series resistance while preserving ULN flyback paths. Do not claim arbitrary inexpensive driver boards are interchangeable without inspection. Measure loaded coil current and motor torque; the Darlington voltage drop reduces coil voltage.

For a bare A3144 or US5881LUA Hall switch, use 5 V supply, shared ground and the external 10 k OUT pullup to 5 V at its MCP input. Do not power these parts at 3.3 V based on the ESP's logic voltage. Confirm the delivered sensor package pin diagram and polarity. US5881LUA is a unipolar, open-drain device, rated from 3.5 V supply; its UA package uses 1=VDD, 2=GND, 3=OUT and senses the South pole at its front. The 3 × 1 mm magnet must actually switch it at the installed gap before gluing. US5881 sensitivity and body fit are not guaranteed to match the original A3144 installation. [Melexis US5881 datasheet](https://www.melexis.com/-/media/files/documents/datasheets/us5881-datasheet-melexis.pdf)

## Bench acceptance order

1. Power off: inspect all polarity, bank address straps, R3 change where applicable, reset continuity,70 resistors and absence of power shorts. Keep the first assembly accessible.
2. With motors disconnected, power C3, shifter and one MCP. Measure3.3 V/5 V domains and reset behavior. The default firmware expects only 0x20; no motors need be connected to inspect the setup UI.
3. Test Hall LOW and HIGH with a loose magnet at the intended gap. Confirm its trailing edge occurs reliably with the new drum. Measure the pulse width against software's two-sample4 ms debounce.
4. Connect one driver/motor. Confirm reset keeps every driver input LOW. Check startup/off current and high input voltage/current with the indicators installed; reduce LED loading if needed.
5. Recover/home the complete 38-position drum. Check correct rotation, no jam, all 38 characters, repeated wraps and homing repeatability. Measure the actual revolution time and calibrate reference/offset. The compile-time `STEPS=2048` assumes the selected motor produces 2048 full steps per output revolution. This is a physical acceptance gate: an offset corrects phase only. If glyph error grows progressively around the drum, do not hide it with an offset; select the correct 1:64 motor or measure and revalidate the firmware step constant and all 38 target positions for the actual gearbox.
6. Add one module at a time, then expand to five banks. Test commands spanning modules6/7 across the row boundary. Confirm no more than four motors energize simultaneously and completed motors release their coils.
7. Test a controlled I²C disconnect with a current-limited setup: RESET should assert and drive release. Reconnect power/bus, inspect, then explicitly recover. Also test absent/stuck Hall and verify the bounded-motion fault.
8. At full build, measure peak input current, far-end voltage, I²C levels/rise time, actual loaded transition times, wire/connector/driver/motor temperatures and behavior after many cycles. Pass these checks before closing the case or leaving the panel unattended.

The electrical and 38-position mechanical revisions are integrated in source and drawings, but remain unverified on purchased physical parts. Software build/test success cannot establish those results.